Wafer (electronics)
A wafer is a thin slice of semiconductor material, such as a silicon crystal, used in the fabrication of integrated circuit and other microdevices. The wafer serves as the substrate for microelectronic devices built in and over the wafer and undergoes many microfabrication process steps such as doping or ion implantation, etching, deposition of various materials, and photolithographic patterning.
Formation
Wafers are formed of highly pure, nearly defect free, single crystalline material. One process for forming crystalline wafers is known as Czochralski growth invented by the Polish chemist Jan Czochralski. In this process, a cylindrical ingot of high purity crystalline silicon is formed by pulling a seed crystal from a 'melt'. [1] [2] The ingot is then sliced with an inner diameter diamond coated blade and polished to form wafers. [3]
Wafer properties
Standard wafer sizes
Silicon wafers are available is a variety of sizes from 1 inch (25.4 mm) to 11.8 inches (300 mm). [4] Semiconductor fabrication plants (also known as fabs) are defined by the size of wafers that they are tooled to produce. The size has gradually increased to improve throughput and reduce cost with the current state-of-the-art fab considered to be 300mm (12 inch).
- 1 inch.
- 2 inch (50.8 mm). Thickness 275 µm.
- 3 inch (76.2 mm). Thickness 375 µm.
- 4 inch (100 mm). Thickness 525 µm.
- 5 inch (125 mm). Thickness 625 µm.
- 6 inch (150 mm). Thickness 675 µm.
- 8 inch (200 mm). Thickness 725 µm.
- 12 inch (300 mm). Thickness 775 µm.
Wafers grown using materials other than silicon are generally not available in sizes over 100 mm, and will have different thicknesses than a silicon wafer of the same diameter. Wafer thickness is determined by the mechanical strength of the material used; the wafer must be thick enough to support its own weight without cracking during handling.
Analytical die-count estimation
For any given wafer diameter [d, mm] and target IC size [S, mm2], there is an exact number of integral die pieces that can be sliced out of the wafer. The gross die count [A] can be estimated by the following expression:
<math>A_{gross} = d\pi\left (\frac{d}{4S} - \frac{1}{\sqrt{2S}} \right)</math>
Note, that the gross die count does not take into account the die defection loss, various alignment markings and test sites on the wafer.
Crystalline Orientation
Wafers are grown from crystal having a regular crystal structure, with silicon having a diamond cubic struture with a lattice spacing of 0.5430710 nm. [5] When cut into wafers, the surface is aligned in one of several relative directions known as crystal orientations. Orientation is defined by the miller index with [100] or [111] types being the most common for silicon. [5] Orientation is important since many of a single crystal's structural and electronic properties are highly anisotropic. Ion implantation depths can depend on the wafers crystal orientation. [6] Wafer cleavage typically occurs only in a few well-defined directions. Scoring the wafer along cleavage planes allows it to be easily diced into individual chips ("dies") so that the billions of individual circuit elements on an average wafer can be separated into many individual circuits.
Wafer Flats and Orientation Notches
Wafers under 200 mm generally have flats cut into one or more sides indicating crystallographic planes of high symmetry (usually the {110} face) and, in old-fashioned wafers (those below about 100 mm diameter), the wafer's orientation and doping type (see illustration for conventions). Modern wafers use a notch to convey this information, in order to waste less material [7].
Impurity Doping
Silicon wafers are generally not 100% pure silicon, but are instead formed with an initial impurtiy doping concentration between 1013 and 1016 per cm3 of boron, phosphorus, arsenic, or antimony which is added to the melt and defines the wafer as either bulk n-type or p-type.[8] However, compared with single-crystal silicon's atomic density of 5×1022 atoms per cm3, this still gives a purity greater than 99.999999%. The wafers can also be initially provided with some interstitial oxygen concentration. Carbon and metallic contamination are kept to a minimum. [9] Transition metals, in particular, must be kept below parts per billion concentrations for electronic applications. [10]
Compound Semiconductors
While silicon is the most prevalent type of wafer used in the electronics industry, other compound III-V or II-VI type wafers have also been employed. Gallium arsenide (GaAs) wafers are one common III-V semiconductor material which can be produced using the Czochralski process. [2]
See also
- Silicon on insulator (SOI) wafers
References
- ↑ Levy, Roland Albert (1989). Microelectronic Materials and Processes. pp. 1–2. ISBN 0792301544. Retrieved 2008-02-23.
- ↑ 2.0 2.1 Grovenor, C. (1989). Microelectronic Materials. CRC Press. pp. 113–123. ISBN 0852742703. Retrieved 2008-02-25.
- ↑ Nishi, Yoshio (2000). Handbook of Semiconductor Manufacturing Technology. CRC Press. pp. 67–71. ISBN 0824787838. Retrieved 2008-02-25.
- ↑ Template:Citeweb
- ↑ 5.0 5.1 O'Mara, William C. (1990). Handbook of Semiconductor Silicon Technology. William Andrew Inc. p. 349-352. ISBN 0815512376. Retrieved 2008-02-24.
- ↑ Nishi, Yoshio (2000). Handbook of Semiconductor Manufacturing Technology. CRC Press. pp. 108–109. ISBN 0824787838. Retrieved 2008-02-25.
- ↑ Template:Citeweb
- ↑ Widmann, Dietrich (2000). Technology of Integrated Circuits. Springer. p. 39. ISBN ISBN 3540661999 Check
|isbn=value: invalid character (help). Retrieved 2008-02-24. - ↑ Levy, Roland Albert (1989). Microelectronic Materials and Processes. pp. 6–7, 13. ISBN 0792301544. Retrieved 2008-02-23.
- ↑ Rockett, Angus (2008). The Materials Science of Semiconductors. p. 13. ISBN 9780387256535.
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